The Heads and Tails Instruction Format

Existing variable-length instruction formats provide higher code densities than fixed-length formats, but are illsuited to pipelined or parallel instruction fetch and decode. However, heads-and-tails (HAT) is a new variable-length instruction format that supports parallel fetch and decode of multiple instructions per cycle, allowing both high code density and rapid execution for high-performance embedded processors. In contrast to earlier schemes that store compressed variable-length instructions in main memory then expand them into fixed-length in-cache formats, the new format is suitable for direct execution from the instruction cache, thereby increasing effective cache capacity and reducing cache power.